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Philips Semiconductors Linear Products
Product specification
Tone decoder/phase-locked loop
NE/SE567
DESCRIPTION
The NE/SE567 tone and frequency decoder is a highly stable phase-locked loop with synchronous AM lock detection and power output circuitry. Its primary function is to drive a load whenever a sustained frequency within its detection band is present at the self-biased input. The bandwidth center frequency and output delay are independently determined by means of four external components.
PIN CONFIGURATIONS
FE, D, N Packages
OUTPUT FILTER CAPACITOR C3 LOW-PASS FILTER CAPACITOR C2 INPUT SUPPLY VOLTAGE V+ 1 2 3 4 TOP VIEW 8 7 6 5 OUTPUT GROUND TIMING ELEMENTS R1 AND C1 TIMING ELEMENT R1
FEATURES
* Wide frequency range (.01Hz to 500kHz) * High stability of center frequency * Independently controllable bandwidth (up to 14%) * High out-band signal and noise rejection * Logic-compatible output with 100mA current sinking capability * Inherent immunity to false signals * Frequency adjustment over a 20-to-1 range with an external
resistor
F Package
OUTPUT 1 C3 2 NC 3 C2 4 INPUT 5 NC 6 VCC 7 TOP VIEW 14 GND 13 NC 12 NC 11 R1C1 10 R1 9 8 NC NC
* Military processing available
APPLICATIONS
* Touch-Tone(R) decoding * Carrier current remote controls * Ultrasonic controls (remote TV, etc.) * Communications paging
BLOCK DIAGRAM
4
* Frequency monitoring and control * Wireless intercom * Precision oscillator
R2 3.9k INPUT V1 3 PHASE DETECTOR 2
R1
5 6 CURRENT CONTROLLED OSCILLATOR R3 + QUADRATURE PHASE DETECTOR - VREF AMP 8 AMP
C1
LOOP LOW PASS FILTER C2
RL
+V 7 C3 OUTPUT FILTER 1
(R)Touch-Tone is a registered trademark of AT&T.
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403
853-0124 06456
-V R41 R42 1 R3 4.7k
4
April 15, 1992
R9 R10 R21 R11 R2 10k R39 5k Q63 Q54 C3 Q14 Q16 Q20 R26 Q61 Q58 Q56 Q57 R36 Q18 R48 R49 2 Q19 -V R19 R36 R43 RL -V R12 EF Q22 Q23 R32 R33 Q30 B R14 -V Cc R15 R16 R23 R17 R26 Q25 Q24 Vi R27 Q32 3 Q33 R48 21k Q43 Q42 Q62 R48 21k A R29 R30 Q40 E Q61 Q34 Q35 Q36 Q37 F Q47 Q46 Q45 Q44 R13 R45 B R20 R22 R40 C2 Q50 C Q59 Q60 B -V R37 Q62 Q55 Q16 Q17 Q21 Vref
R5
R6
Q1
Q10
D
Q8
R7
EQUIVALENT SCHEMATIC
Q12
Philips Semiconductors Linear Products
5
Q13
R1
Tone decoder/phase-locked loop
-V
6
Q6
C1
404
Q26 Q27 Q28 Q40 Q29 B R24 Q31 B Q38 R36 R28 C Q30 R34 R18
Q7
A
Q3
Q9
Q2
R4
Q5
Q41 B
R44
NE/SE567
Product specification
7
Philips Semiconductors Linear Products
Product specification
Tone decoder/phase-locked loop
NE/SE567
ORDERING INFORMATION
DESCRIPTION 8-Pin Plastic SO 14-Pin Cerdip 8-Pin Plastic DIP 8-Pin Plastic SO 8-Pin Cerdip 8-Pin Plastic DIP TEMPERATURE RANGE 0 to +70C 0 to +70C 0 to +70C -55C to +125C -55C to +125C -55C to +125C ORDER CODE NE567D NE567F NE567N SE567D SE567FE SE567N DWG # 0174C 0581B 0404B 0174C 0581B 0404B
ABSOLUTE MAXIMUM RATINGS
SYMBOL TA Operating temperature NE567 SE567 VCC V+ VVOUT TSTG PD Operating voltage Positive voltage at input Negative voltage at input Output voltage (collector of output transistor) Storage temperature range Power dissipation 0 to +70 -55 to +125 10 0.5 +VS -10 15 -65 to +150 300 C C V V VDC VDC C mW PARAMETER RATING UNIT
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Philips Semiconductors Linear Products
Product specification
Tone decoder/phase-locked loop
NE/SE567
DC ELECTRICAL CHARACTERISTICS
V +=5.0V; TA=25C, unless otherwise specified. SYMBOL PARAMETER TEST CONDITIONS Min SE567 Typ 500 -55 to +125C 0 to +70C fO Center frequency distribution fO 1 + 100kHz + 1.1R 1C 1 1 1.1R 1C 1 1 1.1R 1C 1 12 -10 35 140 35 60 0 +10 -10 Max Min NE567 Typ 500 35 140 35 60 0 +10 Max kHz ppm/C ppm/C % UNIT
Center
fO fO
frequency1
Highest center frequency Center frequency stability2
fO
Center frequency shift with supply voltage
f O + 100kHz +
0.5
1
0.7
2
%/V
Detection bandwidth
BW BW BW BW Largest detection bandwidth Largest detection bandwidth skew Largest detection bandwidth-- variation with temperature Largest detection bandwidth-- variation with supply voltage VI=300mVRMS 2 2 %/V VI=300mVRMS f O + 100kHz + 14 2 0.1 16 4 10 14 3 0.1 18 6 % of fO % of fO %/C
Input
RIN VI Input resistance Smallest detectable input voltage4 Largest no-output input voltage4 Greatest simultaneous out-band signal-to-in-band signal ratio Minimum input signal to wide-band noise ratio Bn=140kHz -6 -6 dB IL=100mA, fI=fO IL=100mA, fI=fO 10 15 20 20 15 +6 25 25 10 15 20 20 15 +6 25 25 k mVRMS mVRMS dB
Output
Fastest on-off cycling rate "1" output leakage current "0" output voltage tF tR VCC Output fall time3 V8=15V IL=30mA IL=100mA RL=50 RL=50 4.75 6 RL=20k 11 30 Output rise time3 fO/20 0.01 0.2 0.6 30 150 25 0.4 1.0 fO/20 0.01 0.2 0.6 30 150 25 0.4 1.0 A V V ns ns
General
Operating voltage range Supply current quiescent Supply current--activated tPD Quiescent power dissipation 9.0 8 13 4.75 7 12 35 9.0 10 15 V mA mA mW
NOTES: 1. Frequency determining resistor R1 should be between 2 and 20k 2. Applicable over 4.75V to 5.75V. See graphs for more detailed information. 3. Pin 8 to Pin 1 feedback RL network selected to eliminate pulsing during turn-on and turn-off. 4. With R2=130k from Pin 1 to V+. See Figure 1.
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Philips Semiconductors Linear Products
Product specification
Tone decoder/phase-locked loop
NE/SE567
TYPICAL PERFORMANCE CHARACTERISTICS
Bandwidth vs Input Signal Amplitude
300 250 INPUT VOLTAGE -- mVrms 200 150 100 50 0 0 2 4 6 8 10 12 14 BANDWIDTH -- % OF fO 16
(Hz * F)
Largest Detection bandwidth vs Operating Frequency
15 LARGEST BANDWIDTH -- % OF O f 106
Detection bandwidth as a Function of C2 and C3
10
105
5
104
C3 0 0.1 1 10 100 CENTER FREQUENCY -- kHz 1000 103 0 2 C2 4 6 8 10 12 14 BANDWIDTH -- % OF fO 16
Typical Supply Current vs Supply Voltage
25 1000 500 CUPPLY CURRENT -- mA 20 NO LOAD "ON" CURRENT 15 CYCLES 300 100 50 30 10 4 5 6 7 8 9 10 1
Greatest Number of Cycles Before Output
1.0 0.9 OUTPUT VOLTAGE PIN 8 -- V 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 5 10 50 100 -75 BANDWIDTH LIMITED BY EXTERNAL RESISTOR (MINIMUM C2)
Typical Output Voltage vs Temperature
IL = 100mA
10 QUIESCENT CURRENT 5
IL = 30mA
BANDWIDTH LIMITED BY (C2)
0
-25
0
25
75
125
SUPPLY VOLTAGE -- V
BANDWIDTH -- % OF fO TEMPERATURE -- C
Typical Frequency Drift With Temperature (Mean and SD)
1.5 +V = 4.75V 1.0 0.5 0 -0.5 -1.0 -1.5 -75 -25 0 25 75 125 1.0 0.5 0 -0.5 -1.0 -1.5 -75 1.5
Typical Frequency Drift With Temperature (Mean and SD)
5.5 +V = 5.75V 2.5 0 -2.5 -5.0 -7.5 -10 -25 0 25 75 125 -75 (2)
Typical Frequency Drift With Temperature (Mean and SD)
+V = 7.0V (1) +V = 9.0V (2)
(1)
-25
0
25
75
125
TEMPERATURE -- C
TEMPERATURE -- C
TEMPERATURE -- C
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Philips Semiconductors Linear Products
Product specification
Tone decoder/phase-locked loop
NE/SE567
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
Center Frequency Temperature Coefficient (Mean and SD)
TEMPERATURE COEFFICIENT-- ppm/ C 100 1.0 0.9 0 BANDWIDTH -- % OF f O 0.8 0.7 -100 Dt t -200 t = 0C to 70C -300 4.5 5.0 5.5 6.0 6.5 7.0 0 SUPPLY VOLTAGE -- V 1 2 34 5 10 20 40 100 CENTER FREQUENCY -- kHz O V* 0.6 %V 0.5 0.4 0.3 0.2 0.1 0 -75 12.5 10 10.0 8 7.5 6 4 2 BANDWIDTH AT 25C -25 0 25 75 125 15.0 14 12
Center Frequency Shift With Supply Voltage Change vs Operating Frequency
Typical Bandwidth Variation Temperature
O
5.0 2.5
TEMPERATURE - C
DESIGN FORMULAS
fO [ BW [ 1 1.1R 1 C 1 1070 VI v VI in % of f O fO C2 200mV RMS
OPERATING INSTRUCTIONS
Figure 1 shows a typical connection diagram for the 567. For most applications, the following three-step procedure will be sufficient for choosing the external components R1, C1, C2 and C3. 1. Select R1 and C1 for the desired center frequency. For best temperature stability, R1 should be between 2K and 20K ohm, and the combined temperature coefficient of the R1C1 product should have sufficient stability over the projected temperature range to meet the necessary requirements. 2. Select the low-pass capacitor, C2, by referring to the Bandwidth versus Input Signal Amplitude graph. If the input amplitude Variation is known, the appropriate value of fO C2 necessary to give the desired bandwidth may be found. Conversely, an area of operation may be selected on this graph and the input level and C2 may be adjusted accordingly. For example, constant bandwidth operation requires that input amplitude be above 200mVRMS. The bandwidth, as noted on the graph, is then controlled solely by the fO C2 product (fO (Hz), C2(F)).
Where VI=Input voltage (VRMS) C2=Low-pass filter capacitor (F)
PHASE-LOCKED LOOP TERMINOLOGY CENTER FREQUENCY (fO)
The free-running frequency of the current controlled oscillator (CCO) in the absence of an input signal.
Detection Bandwidth (BW)
The frequency range, centered about fO, within which an input signal above the threshold voltage (typically 20mVRMS) will cause a logical zero state on the output. The detection bandwidth corresponds to the loop capture range.
Lock Range
The largest frequency range within which an input signal above the threshold voltage will hold a logical zero state on the output.
Detection Band Skew
A measure of how well the detection band is centered about the center frequency, fO. The skew is defined as (fMAX+fMIN-2fO)/2fO where fmax and fmin are the frequencies corresponding to the edges of the detection band. The skew can be reduced to zero if necessary by means of an optional centering adjustment.
April 15, 1992
408
Philips Semiconductors Linear Products
Product specification
Tone decoder/phase-locked loop
NE/SE567
TYPICAL RESPONSE
INPUT
OUTPUT NOTE: RL = 100
Response to 100mVRMS Tone Burst
OUTPUT
saturates; its collector voltage being less than 1.0 volt (typically 0.6V) at full output current (100mA). The voltage at Pin 2 is the phase detector output which is a linear function of frequency over the range of 0.95 to 1.05 fO with a slope of about 20mV per percent of frequency deviation. The average voltage at Pin 1 is, during lock, a function of the in-band input amplitude in accordance with the transfer characteristic given. Pin 5 is the controlled oscillator square wave output of magnitude (+V -2VBE)(+V-1.4V) having a DC average of +V/2. A 1k load may be driven from pin 5. Pin 6 is an exponential triangle of 1VP-P with an average DC level of +V/2. Only high impedance loads may be
OUTPUT (PIN 8) 7% 14% BW
V+ 0
INPUT NOTES: S/N = -6dB RL = 100 Noise Bandwidth = 140Hz
VCE (SAT) < 1.0V
3.9V LOW PASS FILTER (PIN 2) 3.8V 3.7V
Response to Same Input Tone Burst With Wideband Noise 3. The value of C3 is generally non-critical. C3 sets the band edge of a low-pass filter which attenuates frequencies outside the detection band to eliminate spurious outputs. If C3 is too small, frequencies just outside the detection band will switch the output stage on and off at the beat frequency, or the output may pulse on and off during the turn-on transient. If C3 is too large, turn-on and turn-off of the
+V +V 0.9fO fO 1.1fO
PIN 1 VOLTAGE (AVG) 4.0 3.5 3.0
VREF THRESHOLD VOLTAGE
f1 = fO 2.5 0 100 IN-BAND INPUT VOLTAGE 200mVrms
INPUT
3 5
4
RL
Figure 2. Typical Output Response
f
O
+
R1 1 R 1C 1 6 2 C2
567
8 R2
7
1 C3 OUTPUT FILTER
C1
LOW PASS FILTER
Figure 1. output stage will be delayed until the voltage on C3 passes the threshold voltage. (Such delay may be desirable to avoid spurious outputs due to transient frequencies.) A typical minimum value for C3 is 2C2. 4. Optional resistor R2 sets the threshold for the largest "no output" input voltage. A value of 130k is used to assure the tested limit of 10mVRMS min. This resistor can be referenced to ground for increased sensitivity. The explanation can be found in the "optional controls" section which follows.
AVAILABLE OUTPUTS (Figure 1)
The primary output is the uncommitted output transistor collector, Pin 8. When an in-band input signal is present, this transistor
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409
Philips Semiconductors Linear Products
Product specification
Tone decoder/phase-locked loop
NE/SE567
V+
R 567 1 C3 567 1 C3 R
cause supply voltage fluctuations which could, for example, shift the detection band of narrow-band systems sufficiently to cause momentary loss of lock. The result is a low-frequency oscillation into and out of lock. Such effects can be prevented by supplying heavy load currents from a separate supply or increasing the supply filter capacitor.
SPEED OF OPERATION
DECREASE SENSITIVITY V+ RA 567 1 50k C3 DECREASE SENSITIVITY INCREASE SENSITIVITY INCREASE SENSITIVITY
RB 2.5k RC 1.0k
Minimum lock-up time is related to the natural frequency of the loop. The lower it is, the longer becomes the turn-on transient. Thus, maximum operating speed is obtained when C2 is at a minimum. When the signal is first applied, the phase may be such as to initially drive the controlled oscillator away from the incoming frequency rather than toward it. Under this condition, which is of course unpredictable, the lock-up transient is at its worst and the theoretical minimum lock-up time is not achievable. We must simply wait for the transient to die out. The following expressions give the values of C2 and C3 which allow highest operating speeds for various band center frequencies. The minimum rate at which digital information may be detected without information loss due to the turn-on transient or output chatter is about 10 cycles per bit, corresponding to an information transfer rate of fO/10 baud.
V+ V+ V+ RA 200 TO 1k V+
SILICON DIODES FOR TEMPERATURE COMPENSATION (OPTIONAL)
Figure 3. Sensitivity Adjust connected to pin 6 without affecting the CCO duty cycle or temperature stability.
OPERATING PRECAUTIONS
A brief review of the following precautions will help the user achieve the high level of performance of which the 567 is capable. 1. Operation in the high input level mode (above 200mV) will free the user from bandwidth variations due to changes in the in-band signal amplitude. The input stage is now limiting, however, so that out-band signals or high noise levels can cause an apparent bandwidth reduction as the inband signal is suppressed. Also, the limiting action will create in-band components from sub-harmonic signals, so the 567 becomes sensitive to signals at fO/3, fO/5, etc. 2. The 567 will lock onto signals near (2n+1) fO, and will give an output for signals near (4n+1) fO where n=0, 1, 2, etc. Thus, signals at 5fO and 9fO can cause an unwanted output. If such signals are anticipated, they should be attenuated before reaching the 567 input. 3. Maximum immunity from noise and out-band signals is afforded in the low input level (below 200mVRMS) and reduced bandwidth operating mode. However, decreased loop damping causes the worst-case lock-up time to increase, as shown by the Greatest Number of Cycles Before Output vs Bandwidth graph. 4. Due to the high switching speeds (20ns) associated with 567 operation, care should be taken in lead routing. Lead lengths should be kept to a minimum. The power supply should be adequately bypassed close to the 567 with a 0.01F or greater capacitor; grounding paths should be carefully chosen to avoid ground loops and unwanted voltage variations. Another factor which must be considered is the effect of load energization on the power supply. For example, an incandescent lamp typically draws 10 times rated current at turn-on. This can be somewhat greater when the output stage is made less sensitive, rejection of third harmonics or in-band harmonics (of lower frequency signals) is also improved.
567 1 8
RL 567 1 Cf C3 Rf* 10k C3 RA 200 TO 1k 8
RL
Rf 10k
1 567 8
Rf 10k
RL
*OPTIONAL - PERMITS LOWER VALUE OF Cf
Figure 4. Chatter Prevention
V+
R 567 2 C2 LOWERS fO RAISES fO 567 2 C2 R
V+ LOWERS fO RA 567 1 50k C2 RAISES fO RB 2.5k RC 1.0k RAISES fO SILICON DIODES FOR TEMPERATURE COMPENSATION (OPTIONAL)
Figure 5. Skew Adjust
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Philips Semiconductors Linear Products
Product specification
Tone decoder/phase-locked loop
NE/SE567
C2 +
130 mF fO 260 mF fO
SENSITIVITY ADJUSTMENT (Figure 3)
When operated as a very narrow-band detector (less than 8 percent), both C2 and C3 are made quite large in order to improve noise and out-band signal rejection. This will inevitably slow the response time. If, however, the output stage is biased closer to the threshold level, the turn-on time can be improved. This is accomplished by drawing additional current to terminal 1. Under this condition, the 567 will also give an output for lower-level signals (10mV or lower). By adding current to terminal 1, the output stage is biased further away from the threshold voltage. This is most useful when, to obtain maximum operating speed, C2 and C3 are made very small. Normally, frequencies just outside the detection band could cause false outputs under this condition. By desensitizing the output stage, the out-band beat notes do not feed through to the output stage. Since the input level must
V+ V+
C3 +
In cases where turn-off time can be sacrificed to achieve fast turn-on, the optional sensitivity adjustment circuit can be used to move the quiescent C3 voltage lower (closer to the threshold voltage). However, sensitivity to beat frequencies, noise and extraneous signals will be increased.
OPTIONAL CONTROLS (Figure 3)
The 567 has been designed so that, for most applications, no external adjustments are required. Certain applications, however, will be greatly facilitated if full advantage is taken of the added control possibilities available through the use of additional external components. In the diagrams given, typical values are suggested where applicable. For best results the resistors used, except where noted, should have the same temperature coefficient. Ideally, silicon diodes would be low-resistivity types, such as forward-biased transistor base-emitter junctions. However, ordinary low-voltage diodes should be adequate for most applications.
250 0.5k 0.9k 1.4k 1.9k INPUT VOLTAGE MV -- RMS 200 2.5k 3.2k 4.0k
RL 567 8 1 RA 10k Rf 20k
CA UNLATCH
C3
150
10k V+
V+
20k 100k 50 R
100 567 8 UNLATCH 1
RL
0
Rf 20k 0 2 4 6 8 10 12 14 16 C3
DETECTION BAND -- % OF fO NOTE: CA prevents latch-up when power supply is turned on. RB R +R C2 RC OPTIONAL SILICON DIODES FOR TEMPERATURE COMPENSATION A ) R BR C RB ) R
V+ RA 50k
PIN 2 567
Figure 7. Output Latching
C
NOTE: 130 f O 10k ) R R t C2 t 1300 10k ) R f O R
Adjust control for symmetry of detection band edges about fO.
Figure 6. BW Reduction
April 15, 1992
411
Philips Semiconductors Linear Products
Product specification
Tone decoder/phase-locked loop
NE/SE567
CHATTER PREVENTION (Figure 4)
Chatter occurs in the output stage when C3 is relatively small, so that the lock transient and the AC components at the quadrature phase detector (lock detector) output cause the output stage to move through its threshold more than once. Many loads, for example lamps and relays, will not respond to the chatter. However, logic may recognize the chatter as a series of outputs. By feeding the output stage output back to its input (Pin 1) the chatter can be eliminated. Three schemes for doing this are given in Figure 4. All operate by feeding the first output step (either on or off) back to the input, pushing the input past the threshold until the transient conditions are over. It is only necessary to assure that the feedback time constant is not so large as to prevent operation at the highest anticipated speed. Although chatter can always be eliminated by making C3 large, the feedback circuit will enable faster operation of the 567 by allowing C3 to be kept small. Note that if the feedback time constant is made quite large, a short burst at the input frequency can be stretched into a long output pulse. This may be useful to drive, for example, stepping relays.
ALTERNATE METHOD OF BANDWIDTH REDUCTION (Figure 6)
Although a large value of C2 will reduce the bandwidth, it also reduces the loop damping so as to slow the circuit response time. This may be undesirable. Bandwidth can be reduced by reducing the loop gain. This scheme will improve damping and permit faster operation under narrow-band conditions. Note that the reduced impedance level at terminal 2 will require that a larger value of C2 be used for a given filter cutoff frequency. If more than three 567s are to be used, the network of RB and RC can be eliminated and the RA resistors connected together. A capacitor between this junction and ground may be required to shunt high frequency components.
OUTPUT LATCHING (Figure 7)
To latch the output on after a signal is received, it is necessary to provide a feedback resistor around the output stage (between Pins 8 and 1). Pin 1 is pulled up to unlatch the output stage.
DETECTION BAND CENTERING (OR SKEW) ADJUSTMENT (Figure 5)
When it is desired to alter the location of the detection band (corresponding to the loop capture range) within the lock range, the circuits shown above can be used. By moving the detection band to one edge of the range, for example, input signal variations will expand the detection band in only one direction. This may prove useful when a strong but undesirable signal is expected on one side or the other of the center frequency. Since RB also alters the duty cycle slightly, this method may be used to obtain a precise duty cycle when the 567 is used as an oscillator.
REDUCTION OF C1 VALUE
For precision very low-frequency applications, where the value of C1 becomes large, an overall cost savings may be achieved by inserting a voltage-follower between the R1 C1 junction and Pin 6, so as to allow a higher value of R1 and a lower value of C1 for a given frequency.
PROGRAMMING
To change the center frequency, the value of R1 can be changed with a mechanical or solid state switch, or additional C1 capacitors may be added by grounding them through saturating NPN transistors.
April 15, 1992
412
Philips Semiconductors Linear Products
Product specification
Tone decoder/phase-locked loop
NE/SE567
TYPICAL APPLICATIONS
+ R3 567 897Hz R2 R1 C1 567 770Hz C3 C2 + DIGIT 1 2 3 4
+
5 6
567 852Hz
7 8 + 9
567 941Hz
0
+ * 567 1209Hz
NOTES: Component values (Typical) R1 = 26.8 to 15k R2 = 24.7k R3 = 20k C1 = 0.10mF C2 = 1.0mF 5V C3 = 2.2mF 6V C4 = 250F 6V 567 1477Hz 567 1336Hz
+
+
Touch-Tone(R) Decoder
April 15, 1992
413
Philips Semiconductors Linear Products
Product specification
Tone decoder/phase-locked loop
NE/SE567
TYPICAL APPLICATIONS (Continued)
+5 TO 15V
60Hz AC LINE
50-200VRMS LOAD C4 27pF 3 5 1:1 R1 2.5k 567 6 2 1 C1 8 K1 R1 5 567 - + 5741 + 6
500pF
fO 100kHz C1 0.004mfd
C2 .006 C3 .02 AUDIO OUT (IF INPUT IS FREQUENCY MODULATED) 3 5 +V INPUT SIGNAL (>100mVrms) 20k f1 3 5 6 567 2 1 8 R1
Precision VLF
+V
Carrier-Current Remote Control or Intercom
567 6 2 1
8
C2 C1 C3 RL
R1 3 INPUT CHANNEL OR RECEIVER NOR C1 C2 C3 +V VO 5 6 567 2 1 8
20k f2 3 5 6 567 2 1 8
R'1
C'1
C'2
130 C 2 + C2 + (mfd) f O C 1 + C1 R 1 + 1.12R 1
R'1
24% Bandwidth Tone Decoder
OUTPUT (INTO 1k OHM MIN. LOAD) 3 2 567 6 R1 5 f2 +90 PHASE SHIFT
C'1
C'2
C'3
100mv (pp) SQUARE OR 50mVRMS SINE INPUT
Dual-Tone Decoder
C2 C1 NOTES: R2 = R1/5 Adjust R1 so that = 90 with control midway.
0 to 180 Phase Shifter
NOTES: 1. Resistor and capacitor values chosen for desired frequencies and bandwidth. 2. If C3 is made large so as to delay turn-on of the top 567, decoding of sequential (f1 f2) tones is possible.
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414
Philips Semiconductors Linear Products
Product specification
Tone decoder/phase-locked loop
NE/SE567
TYPICAL APPLICATIONS (Continued)
+ +
RL 3 2 CONNECT PIN 3 TO 2.8V TO INVERT OUTPUT R1 RL > 1000 R1 10k 567 6 5 8 80 2 6 5 3 567 8
RL 2 VCO TERMINAL (6%)
567 6 5
fO
R1
RL > 1000
C2 CL C2 C1
C1
Oscillator With Quadrature Output
Oscillator With Double Frequency Output
Precision Oscillator With 20ns Switching
+ + RL 567 3 6 5 8 1 2 10k VCO TERMINAL (6%) R1 C2 C1 C1 C1 R1 100k 567 6 5 8 1k (MIN) 1 RL 6 567 5 OUTPUT
DUTY CYCLE ADJUST
Pulse Generator With 25% Duty Cycle
Precision Oscillator to Switch 100mA Loads
Pulse Generator
April 15, 1992
415

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